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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-03 18:47:09 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-03 18:47:09 -0800 |
| commit | a181ff66d3094e5740b0c803e6fafa8e91bb11e5 (patch) | |
| tree | 570b09344d4506ca2f605130e6dc51fe09064d21 /backends/aiger/xaiger.cc | |
| parent | f98aa1c13fdba69a2ceedd1f3b6613816c60a637 (diff) | |
| download | yosys-a181ff66d3094e5740b0c803e6fafa8e91bb11e5.tar.gz yosys-a181ff66d3094e5740b0c803e6fafa8e91bb11e5.tar.bz2 yosys-a181ff66d3094e5740b0c803e6fafa8e91bb11e5.zip | |
Add abc9_init wire, attach to abc9_flop cell
Diffstat (limited to 'backends/aiger/xaiger.cc')
0 files changed, 0 insertions, 0 deletions