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authorwhitequark <whitequark@whitequark.org>2020-06-11 12:42:37 +0000
committerwhitequark <whitequark@whitequark.org>2020-06-11 12:43:17 +0000
commitfa04b1967076d8a97bdd8802664fd2d1a2424be2 (patch)
tree2b62e95fbd193ffff5d0ccaafd237f22947e3d12 /backends/cxxrtl/cxxrtl_backend.cc
parent8a4841d78690313a91af97e8c6d9aa3e65a3e491 (diff)
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cxxrtl: expose RTLIL::{Wire,Memory}->start_offset in debug info.
Diffstat (limited to 'backends/cxxrtl/cxxrtl_backend.cc')
-rw-r--r--backends/cxxrtl/cxxrtl_backend.cc12
1 files changed, 8 insertions, 4 deletions
diff --git a/backends/cxxrtl/cxxrtl_backend.cc b/backends/cxxrtl/cxxrtl_backend.cc
index 052053c52..dd2029dc5 100644
--- a/backends/cxxrtl/cxxrtl_backend.cc
+++ b/backends/cxxrtl/cxxrtl_backend.cc
@@ -1641,17 +1641,20 @@ struct CxxrtlWorker {
dump_const(debug_const_wires[wire]);
f << ";\n";
f << indent << "items.emplace(path + " << escape_cxx_string(get_hdl_name(wire));
- f << ", debug_item(const_" << mangle(wire) << "));\n";
+ f << ", debug_item(const_" << mangle(wire) << ", ";
+ f << wire->start_offset << "));\n";
count_const_wires++;
} else if (debug_alias_wires.count(wire)) {
// Alias of a member wire
f << indent << "items.emplace(path + " << escape_cxx_string(get_hdl_name(wire));
- f << ", debug_item(debug_alias(), " << mangle(debug_alias_wires[wire]) << "));\n";
+ f << ", debug_item(debug_alias(), " << mangle(debug_alias_wires[wire]) << ", ";
+ f << wire->start_offset << "));\n";
count_alias_wires++;
} else if (!localized_wires.count(wire)) {
// Member wire
f << indent << "items.emplace(path + " << escape_cxx_string(get_hdl_name(wire));
- f << ", debug_item(" << mangle(wire) << "));\n";
+ f << ", debug_item(" << mangle(wire) << ", ";
+ f << wire->start_offset << "));\n";
count_member_wires++;
} else {
count_skipped_wires++;
@@ -1661,7 +1664,8 @@ struct CxxrtlWorker {
if (memory_it.first[0] != '\\')
continue;
f << indent << "items.emplace(path + " << escape_cxx_string(get_hdl_name(memory_it.second));
- f << ", debug_item(" << mangle(memory_it.second) << "));\n";
+ f << ", debug_item(" << mangle(memory_it.second) << ", ";
+ f << memory_it.second->start_offset << "));\n";
}
for (auto cell : module->cells()) {
if (is_internal_cell(cell->type))