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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-04-30 13:19:27 -0700 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-04-30 13:19:27 -0700 |
| commit | 58650ffe876d1caedd8ffc9b0207f5cf75eef97b (patch) | |
| tree | 5389584f1c3ad8c9e9003e78d4b6e22dca5e3a83 /backends/intersynth/intersynth.cc | |
| parent | 354ba5ba83f7b1fc3bb07aa6bf26dde7a00201d1 (diff) | |
| parent | e35fe1344dd4c8f11632ed2a7f5b0463352a1ee4 (diff) | |
| download | yosys-58650ffe876d1caedd8ffc9b0207f5cf75eef97b.tar.gz yosys-58650ffe876d1caedd8ffc9b0207f5cf75eef97b.tar.bz2 yosys-58650ffe876d1caedd8ffc9b0207f5cf75eef97b.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'backends/intersynth/intersynth.cc')
| -rw-r--r-- | backends/intersynth/intersynth.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/intersynth/intersynth.cc b/backends/intersynth/intersynth.cc index 2eb08dbe9..b0e3cd252 100644 --- a/backends/intersynth/intersynth.cc +++ b/backends/intersynth/intersynth.cc @@ -127,7 +127,7 @@ struct IntersynthBackend : public Backend { RTLIL::Module *module = module_it.second; SigMap sigmap(module); - if (module->get_bool_attribute("\\blackbox")) + if (module->get_blackbox_attribute()) continue; if (module->memories.size() == 0 && module->processes.size() == 0 && module->cells_.size() == 0) continue; |