diff options
| author | Benedikt Tutzer <e1225461@student.tuwien.ac.at> | 2019-04-30 13:22:33 +0200 |
|---|---|---|
| committer | Benedikt Tutzer <e1225461@student.tuwien.ac.at> | 2019-04-30 13:22:33 +0200 |
| commit | dc06e3a28bdb902d9b95d5d4ff2f163ee010aff4 (patch) | |
| tree | 8d6a4b7ebcf96a2fe5b5bdb21b821555a3a3b994 /backends/intersynth/intersynth.cc | |
| parent | 124a284487ce4c7b58f2377f04123e15e83e478d (diff) | |
| parent | 314ff1e4ca00ef8024bbb0d2f031efd78b01f9a1 (diff) | |
| download | yosys-dc06e3a28bdb902d9b95d5d4ff2f163ee010aff4.tar.gz yosys-dc06e3a28bdb902d9b95d5d4ff2f163ee010aff4.tar.bz2 yosys-dc06e3a28bdb902d9b95d5d4ff2f163ee010aff4.zip | |
Merge branch 'master' of https://github.com/YosysHQ/yosys into feature/python_bindings
Diffstat (limited to 'backends/intersynth/intersynth.cc')
| -rw-r--r-- | backends/intersynth/intersynth.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/intersynth/intersynth.cc b/backends/intersynth/intersynth.cc index 2eb08dbe9..b0e3cd252 100644 --- a/backends/intersynth/intersynth.cc +++ b/backends/intersynth/intersynth.cc @@ -127,7 +127,7 @@ struct IntersynthBackend : public Backend { RTLIL::Module *module = module_it.second; SigMap sigmap(module); - if (module->get_bool_attribute("\\blackbox")) + if (module->get_blackbox_attribute()) continue; if (module->memories.size() == 0 && module->processes.size() == 0 && module->cells_.size() == 0) continue; |