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author | David Shah <dave@ds0.me> | 2019-08-08 11:40:09 +0100 |
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committer | David Shah <dave@ds0.me> | 2019-08-08 11:40:09 +0100 |
commit | 83b2e0272333cfcc2529e0833723a52c066146a6 (patch) | |
tree | 9985b7f840383419ebd5b189023ca6871a02d5a9 /backends/simplec | |
parent | b8cd4ad64ae9a45faecffc1a6b92a8219755bc60 (diff) | |
parent | fb568ddb4e2ccaab352d9d062f6b4926aca75680 (diff) | |
download | yosys-83b2e0272333cfcc2529e0833723a52c066146a6.tar.gz yosys-83b2e0272333cfcc2529e0833723a52c066146a6.tar.bz2 yosys-83b2e0272333cfcc2529e0833723a52c066146a6.zip |
Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
Diffstat (limited to 'backends/simplec')
-rw-r--r-- | backends/simplec/simplec.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/backends/simplec/simplec.cc b/backends/simplec/simplec.cc index 6f2ccbe20..54dbb84af 100644 --- a/backends/simplec/simplec.cc +++ b/backends/simplec/simplec.cc @@ -472,7 +472,7 @@ struct SimplecWorker return; } - if (cell->type == "$_MUX_") + if (cell->type.in("$_MUX_", "$_NMUX_")) { SigBit a = sigmaps.at(work->module)(cell->getPort("\\A")); SigBit b = sigmaps.at(work->module)(cell->getPort("\\B")); @@ -484,7 +484,9 @@ struct SimplecWorker string s_expr = s.wire ? util_get_bit(work->prefix + cid(s.wire->name), s.wire->width, s.offset) : s.data ? "1" : "0"; // casts to bool are a workaround for CBMC bug (https://github.com/diffblue/cbmc/issues/933) - string expr = stringf("%s ? (bool)%s : (bool)%s", s_expr.c_str(), b_expr.c_str(), a_expr.c_str()); + string expr = stringf("%s ? %s(bool)%s : %s(bool)%s", s_expr.c_str(), + cell->type == "$_NMUX_" ? "!" : "", b_expr.c_str(), + cell->type == "$_NMUX_" ? "!" : "", a_expr.c_str()); log_assert(y.wire); funct_declarations.push_back(util_set_bit(work->prefix + cid(y.wire->name), y.wire->width, y.offset, expr) + |