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author | Clifford Wolf <clifford@clifford.at> | 2019-04-18 17:42:12 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-04-18 17:45:47 +0200 |
commit | f4abc21d8ad79621cc24852bd76abf40a9d9f702 (patch) | |
tree | 016692552e9880b3e37a715b53f45db707c83a91 /backends/smv | |
parent | ea8ac0aaad3a1f89ead8eb44b2fef5927f29a099 (diff) | |
download | yosys-f4abc21d8ad79621cc24852bd76abf40a9d9f702.tar.gz yosys-f4abc21d8ad79621cc24852bd76abf40a9d9f702.tar.bz2 yosys-f4abc21d8ad79621cc24852bd76abf40a9d9f702.zip |
Add "whitebox" attribute, add "read_verilog -wb"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'backends/smv')
-rw-r--r-- | backends/smv/smv.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/smv/smv.cc b/backends/smv/smv.cc index f379c9c48..d75456c1b 100644 --- a/backends/smv/smv.cc +++ b/backends/smv/smv.cc @@ -739,7 +739,7 @@ struct SmvBackend : public Backend { pool<Module*> modules; for (auto module : design->modules()) - if (!module->get_bool_attribute("\\blackbox") && !module->has_memories_warn() && !module->has_processes_warn()) + if (!module->get_blackbox_attribute() && !module->has_memories_warn() && !module->has_processes_warn()) modules.insert(module); if (template_f.is_open()) |