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author | Clifford Wolf <clifford@clifford.at> | 2013-03-21 09:51:25 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-03-21 09:51:25 +0100 |
commit | 87c771756661fda7dbcdd0bd1bf41af0c818e0d7 (patch) | |
tree | 39d852b2a1f1fc3c4cfdb0e06c0497e2d78ef976 /backends/verilog/Makefile.inc | |
parent | 91b94ef57bce14b346830f19f378fbb9fd495c96 (diff) | |
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Avoid verilog-2k in verilog backend
Diffstat (limited to 'backends/verilog/Makefile.inc')
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