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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 15:58:01 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 15:58:01 -0700 |
| commit | cea7441d8ae7df8d22f510e6a101ec46a9d7751e (patch) | |
| tree | 8067ba09ecfaf6d9cf32e8ed9adba42be27b86a4 /backends/verilog/verilog_backend.cc | |
| parent | c865559f9540c29cb9c6302edc8b4a2620c0b49d (diff) | |
| parent | bb2144ae733f1a2c5e629a8251bfbdcc15559aa4 (diff) | |
| download | yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.tar.gz yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.tar.bz2 yosys-cea7441d8ae7df8d22f510e6a101ec46a9d7751e.zip | |
Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'backends/verilog/verilog_backend.cc')
| -rw-r--r-- | backends/verilog/verilog_backend.cc | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 827af5d85..087c6fec6 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -364,20 +364,22 @@ void dump_sigspec(std::ostream &f, const RTLIL::SigSpec &sig) } } -void dump_attributes(std::ostream &f, std::string indent, dict<RTLIL::IdString, RTLIL::Const> &attributes, char term = '\n', bool modattr = false) +void dump_attributes(std::ostream &f, std::string indent, dict<RTLIL::IdString, RTLIL::Const> &attributes, char term = '\n', bool modattr = false, bool as_comment = false) { if (noattr) return; + if (attr2comment) + as_comment = true; for (auto it = attributes.begin(); it != attributes.end(); ++it) { - f << stringf("%s" "%s %s", indent.c_str(), attr2comment ? "/*" : "(*", id(it->first).c_str()); + f << stringf("%s" "%s %s", indent.c_str(), as_comment ? "/*" : "(*", id(it->first).c_str()); f << stringf(" = "); if (modattr && (it->second == Const(0, 1) || it->second == Const(0))) f << stringf(" 0 "); else if (modattr && (it->second == Const(1, 1) || it->second == Const(1))) f << stringf(" 1 "); else - dump_const(f, it->second, -1, 0, false, attr2comment); - f << stringf(" %s%c", attr2comment ? "*/" : "*)", term); + dump_const(f, it->second, -1, 0, false, as_comment); + f << stringf(" %s%c", as_comment ? "*/" : "*)", term); } } @@ -1492,12 +1494,14 @@ void dump_proc_switch(std::ostream &f, std::string indent, RTLIL::SwitchRule *sw return; } + dump_attributes(f, indent, sw->attributes); f << stringf("%s" "casez (", indent.c_str()); dump_sigspec(f, sw->signal); f << stringf(")\n"); bool got_default = false; for (auto it = sw->cases.begin(); it != sw->cases.end(); ++it) { + dump_attributes(f, indent + " ", (*it)->attributes, '\n', /*modattr=*/false, /*as_comment=*/true); if ((*it)->compare.size() == 0) { if (got_default) continue; @@ -1662,7 +1666,7 @@ void dump_module(std::ostream &f, std::string indent, RTLIL::Module *module) } } - dump_attributes(f, indent, module->attributes, '\n', true); + dump_attributes(f, indent, module->attributes, '\n', /*attr2comment=*/true); f << stringf("%s" "module %s(", indent.c_str(), id(module->name, false).c_str()); bool keep_running = true; for (int port_id = 1; keep_running; port_id++) { |