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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-19 13:33:33 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-19 13:33:33 +0100 |
| commit | 9f10acb84042ce0943c3b4d1234efa3899f0dff1 (patch) | |
| tree | 0093dadd88b796f71361599402bccbfc4c8024de /backends/verilog | |
| parent | d8a7fa6b6771245b99af41783cbb3b8c0a12946a (diff) | |
| download | yosys-9f10acb84042ce0943c3b4d1234efa3899f0dff1.tar.gz yosys-9f10acb84042ce0943c3b4d1234efa3899f0dff1.tar.bz2 yosys-9f10acb84042ce0943c3b4d1234efa3899f0dff1.zip | |
added optimizations for single-bit $eq/$ne with constant input to opt_const
Diffstat (limited to 'backends/verilog')
0 files changed, 0 insertions, 0 deletions