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author | Clifford Wolf <clifford@clifford.at> | 2016-09-08 11:16:12 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-09-08 11:16:12 +0200 |
commit | 14bfd3c5c159626a2b3b8dec3a446e0f7c4c7e0c (patch) | |
tree | 2172481d66d33929dba269dcbe8905a3b81d9221 /backends | |
parent | 209a3d9ffcb5f7efbe60b0e0d45755329532535e (diff) | |
download | yosys-14bfd3c5c159626a2b3b8dec3a446e0f7c4c7e0c.tar.gz yosys-14bfd3c5c159626a2b3b8dec3a446e0f7c4c7e0c.tar.bz2 yosys-14bfd3c5c159626a2b3b8dec3a446e0f7c4c7e0c.zip |
yosys-smtbmc meminit support
Diffstat (limited to 'backends')
-rw-r--r-- | backends/smt2/smt2.cc | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/backends/smt2/smt2.cc b/backends/smt2/smt2.cc index 7c0ecf3b1..000240a73 100644 --- a/backends/smt2/smt2.cc +++ b/backends/smt2/smt2.cc @@ -736,6 +736,26 @@ struct Smt2Worker std::string expr_d = stringf("(|%s#%d#%d| state)", get_id(module), arrayid, wr_ports); std::string expr_q = stringf("(|%s#%d#0| next_state)", get_id(module), arrayid); trans.push_back(stringf(" (= %s %s) ; %s\n", expr_d.c_str(), expr_q.c_str(), get_id(cell))); + + Const init_data = cell->getParam("\\INIT"); + int memsize = cell->getParam("\\SIZE").as_int(); + + for (int i = 0; i < memsize; i++) + { + if (GetSize(init_data) < i*width) + break; + + Const initword = init_data.extract(i*width, width, State::Sx); + bool gen_init_constr = false; + + for (auto bit : initword.bits) + if (bit == State::S0 || bit == State::S1) + gen_init_constr = true; + + init_list.push_back(stringf("(= (select (|%s#%d#0| state) #b%s) #b%s) ; %s[%d]", + get_id(module), arrayid, Const(i, abits).as_string().c_str(), + initword.as_string().c_str(), get_id(cell), i)); + } } } } @@ -864,8 +884,8 @@ struct Smt2Backend : public Backend { log(" this will print the recursive walk used to export the modules.\n"); log("\n"); log(" -nobv\n"); - log(" disable support for BitVec (FixedSizeBitVectors theory). with this\n"); - log(" option set multi-bit wires are represented using the BitVec sort and\n"); + log(" disable support for BitVec (FixedSizeBitVectors theory). without this\n"); + log(" option multi-bit wires are represented using the BitVec sort and\n"); log(" support for coarse grain cells (incl. arithmetic) is enabled.\n"); log("\n"); log(" -nomem\n"); @@ -878,7 +898,7 @@ struct Smt2Backend : public Backend { log("\n"); log(" -wires\n"); log(" create '<mod>_n' functions for all public wires. by default only ports,\n"); - log(" registers, and wires with the 'keep' attribute set are exported.\n"); + log(" registers, and wires with the 'keep' attribute are exported.\n"); log("\n"); log(" -tpl <template_file>\n"); log(" use the given template file. the line containing only the token '%%%%'\n"); |