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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-16 13:44:15 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-16 13:44:15 -0700 |
| commit | 43cd047fb9d73c43f8fe2c35c457cfa8fc3523ec (patch) | |
| tree | 6f5f5f76e629c3f341e56e177fc8ab39b8da91cf /backends | |
| parent | 61ca83e099ce9b08b0dcbfaac65a2e2870d58413 (diff) | |
| download | yosys-43cd047fb9d73c43f8fe2c35c457cfa8fc3523ec.tar.gz yosys-43cd047fb9d73c43f8fe2c35c457cfa8fc3523ec.tar.bz2 yosys-43cd047fb9d73c43f8fe2c35c457cfa8fc3523ec.zip | |
Do not put constants into output_bits
Diffstat (limited to 'backends')
| -rw-r--r-- | backends/aiger/xaiger.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 99ca4f8d5..7c7697874 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -229,9 +229,9 @@ struct XAigerWriter /*if (!output_bits.count(b))*/ if (abc_box) co_bits.emplace_back(b, 0); - else { + else if (b.wire) { output_bits.insert(b); - if (b.wire && !b.wire->port_input) + if (!b.wire->port_input) unused_bits.erase(b); } } |