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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-07-30 16:04:27 -0700 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-07-30 16:04:27 -0700 |
| commit | e8341d949f79e501abcf637edd3e7d409e2dd72c (patch) | |
| tree | 7a2f88af3d923113c2a02eaa23d663b474b21cd2 /examples/mimas2/example.v | |
| parent | c66b7402c06455535bb43ee65fe20515b5b9c0ee (diff) | |
| parent | b4f38cca77a78884ce215190935af78cae92c4db (diff) | |
| download | yosys-e8341d949f79e501abcf637edd3e7d409e2dd72c.tar.gz yosys-e8341d949f79e501abcf637edd3e7d409e2dd72c.tar.bz2 yosys-e8341d949f79e501abcf637edd3e7d409e2dd72c.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'examples/mimas2/example.v')
| -rw-r--r-- | examples/mimas2/example.v | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/examples/mimas2/example.v b/examples/mimas2/example.v new file mode 100644 index 000000000..2a9117393 --- /dev/null +++ b/examples/mimas2/example.v @@ -0,0 +1,14 @@ +module example( + input wire CLK, + output wire [7:0] LED +); + +reg [27:0] ctr; +initial ctr = 0; + +always @(posedge CLK) + ctr <= ctr + 1; + +assign LED = ctr[27:20]; + +endmodule |