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author | David Shah <dave@ds0.me> | 2019-08-30 13:57:15 +0100 |
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committer | David Shah <dave@ds0.me> | 2019-08-30 13:57:15 +0100 |
commit | 6919c0f9b010c94a0a1a31cd788301e78a1bcbfb (patch) | |
tree | 4780799b6c1dc1d150b80aa142e6c53e06760cb3 /examples | |
parent | edff79a25a802e5b1816608b48e3ac335ad87147 (diff) | |
parent | 694e30a35426b9582a1f2db730528d4d34305795 (diff) | |
download | yosys-6919c0f9b010c94a0a1a31cd788301e78a1bcbfb.tar.gz yosys-6919c0f9b010c94a0a1a31cd788301e78a1bcbfb.tar.bz2 yosys-6919c0f9b010c94a0a1a31cd788301e78a1bcbfb.zip |
Merge branch 'master' into xc7dsp
Diffstat (limited to 'examples')
-rw-r--r-- | examples/mimas2/run_yosys.ys | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/examples/mimas2/run_yosys.ys b/examples/mimas2/run_yosys.ys index b3204b1ca..b48877811 100644 --- a/examples/mimas2/run_yosys.ys +++ b/examples/mimas2/run_yosys.ys @@ -1,4 +1,3 @@ read_verilog example.v -synth_xilinx -top example -family xc6s -iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I +synth_xilinx -top example -family xc6s -ise write_edif -pvector bra example.edif |