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authorEddie Hung <eddie@fpgeh.com>2019-08-28 15:19:10 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-28 15:19:10 -0700
commit8d820a9884c0a58ee7817a2052d8b915578a7ba7 (patch)
tree7868bc0063dd0d36aa84a48c8ede1a3f3a8c37c3 /examples
parent3fa826254fb337e39334c8d94df6bcc142d17934 (diff)
parentfc727fa5c9e0a04a5dc1b4fcef652c5bca90b220 (diff)
downloadyosys-8d820a9884c0a58ee7817a2052d8b915578a7ba7.tar.gz
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Merge remote-tracking branch 'origin/master' into xaig_arrival
Diffstat (limited to 'examples')
-rw-r--r--examples/mimas2/run_yosys.ys3
1 files changed, 1 insertions, 2 deletions
diff --git a/examples/mimas2/run_yosys.ys b/examples/mimas2/run_yosys.ys
index b3204b1ca..b48877811 100644
--- a/examples/mimas2/run_yosys.ys
+++ b/examples/mimas2/run_yosys.ys
@@ -1,4 +1,3 @@
read_verilog example.v
-synth_xilinx -top example -family xc6s
-iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I
+synth_xilinx -top example -family xc6s -ise
write_edif -pvector bra example.edif