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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-08 08:37:44 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-08 08:37:44 -0800 |
| commit | 36c56bf4127edc1ed0f8fbbd62bd70a859263570 (patch) | |
| tree | 764e93cf094a6a96713709d635696d8a3c4c0ffd /frontends/aiger/aigerparse.cc | |
| parent | 5e24251a61b8798e597ac49bdc8aff2f378f625d (diff) | |
| download | yosys-36c56bf4127edc1ed0f8fbbd62bd70a859263570.tar.gz yosys-36c56bf4127edc1ed0f8fbbd62bd70a859263570.tar.bz2 yosys-36c56bf4127edc1ed0f8fbbd62bd70a859263570.zip | |
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Diffstat (limited to 'frontends/aiger/aigerparse.cc')
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index c3cc6b321..56e4f3b2c 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -135,6 +135,7 @@ static void parse_aiger_ascii(RTLIL::Design *design, std::istream &f, std::strin module->addDff(NEW_ID, clk_wire, d_wire, q_wire); + // Reset logic is optional in AIGER 1.9 if (f.peek() == ' ') { if (!(f >> l3)) log_error("Line %d cannot be interpreted as a latch!\n", line_count); |