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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-14 10:27:30 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-14 10:27:30 -0700 |
| commit | a3be25ab0d6040564ad9082db231478b21e021ac (patch) | |
| tree | 0c01485bf628a66c1a2f9f2073af273bfd804b10 /frontends/aiger/aigerparse.cc | |
| parent | 1948e7c846ea318d003148974945d917701a4452 (diff) | |
| download | yosys-a3be25ab0d6040564ad9082db231478b21e021ac.tar.gz yosys-a3be25ab0d6040564ad9082db231478b21e021ac.tar.bz2 yosys-a3be25ab0d6040564ad9082db231478b21e021ac.zip | |
Cleanup
Diffstat (limited to 'frontends/aiger/aigerparse.cc')
| -rw-r--r-- | frontends/aiger/aigerparse.cc | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index c41772c92..a72a82926 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -30,7 +30,7 @@ #include "kernel/yosys.h" #include "kernel/sigtools.h" -#include "kernel/consteval.h" +#include "kernel/celltypes.h" #include "aigerparse.h" YOSYS_NAMESPACE_BEGIN @@ -44,15 +44,11 @@ struct ConstEvalAig ConstEvalAig(RTLIL::Module *module) : module(module) { - CellTypes ct; - ct.setup_internals(); - ct.setup_stdcells(); - for (auto &it : module->cells_) { - if (!ct.cell_known(it.second->type)) + if (!yosys_celltypes.cell_known(it.second->type)) continue; for (auto &it2 : it.second->connections()) - if (ct.cell_output(it.second->type, it2.first)) { + if (yosys_celltypes.cell_output(it.second->type, it2.first)) { auto r = sig2driver.insert(std::make_pair(it2.second, it.second)); log_assert(r.second); } |