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| author | Clifford Wolf <clifford@clifford.at> | 2019-08-19 13:04:06 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-08-19 13:04:06 +0200 |
| commit | 1e3dd0a2da1c8a6a34d2a664f938a90fc83e81a9 (patch) | |
| tree | 7b7830c5da434964fd40792c393c45a31b8ad080 /frontends/ast/ast.cc | |
| parent | f20be90436b32e853d68c7e102a65d43f3843d91 (diff) | |
| parent | 3edb0abed88565447d5193f78261400655aa843a (diff) | |
| download | yosys-1e3dd0a2da1c8a6a34d2a664f938a90fc83e81a9.tar.gz yosys-1e3dd0a2da1c8a6a34d2a664f938a90fc83e81a9.tar.bz2 yosys-1e3dd0a2da1c8a6a34d2a664f938a90fc83e81a9.zip | |
Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen
Diffstat (limited to 'frontends/ast/ast.cc')
| -rw-r--r-- | frontends/ast/ast.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 07ef0a86e..0d6626b19 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -1172,7 +1172,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump if (design->has((*it)->str)) { RTLIL::Module *existing_mod = design->module((*it)->str); - if (!nooverwrite && !overwrite && !existing_mod->get_bool_attribute("\\blackbox")) { + if (!nooverwrite && !overwrite && !existing_mod->get_blackbox_attribute()) { log_file_error((*it)->filename, (*it)->linenum, "Re-definition of module `%s'!\n", (*it)->str.c_str()); } else if (nooverwrite) { log("Ignoring re-definition of module `%s' at %s:%d.\n", |