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| author | Clifford Wolf <clifford@clifford.at> | 2014-01-19 04:18:22 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-01-19 04:18:22 +0100 |
| commit | 9a1eb45c7517f224a2516ce235fd53d01d9ef908 (patch) | |
| tree | bb049a5739784ba74c7574433cc0a7ab73d4b400 /frontends/ast/ast.cc | |
| parent | 3d7a1491aac0849a2a9fae2a06242e125de883d0 (diff) | |
| download | yosys-9a1eb45c7517f224a2516ce235fd53d01d9ef908.tar.gz yosys-9a1eb45c7517f224a2516ce235fd53d01d9ef908.tar.bz2 yosys-9a1eb45c7517f224a2516ce235fd53d01d9ef908.zip | |
Added Verilog parser support for asserts
Diffstat (limited to 'frontends/ast/ast.cc')
| -rw-r--r-- | frontends/ast/ast.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 201584885..ecc58cf63 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -80,6 +80,7 @@ std::string AST::type2str(AstNodeType type) X(AST_CELLTYPE) X(AST_IDENTIFIER) X(AST_PREFIX) + X(AST_ASSERT) X(AST_FCALL) X(AST_TO_SIGNED) X(AST_TO_UNSIGNED) |