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| author | Jeff Wang <jjj11x@gmail.com> | 2018-03-09 12:47:11 +0000 |
|---|---|---|
| committer | Jeff Wang <jeffrey.wang@ll.mit.edu> | 2020-01-16 13:51:47 -0500 |
| commit | 16ea4ea61abd8f000564b3bfe1c88246c1caf631 (patch) | |
| tree | a7ccb4fc5f099428177df00a0a2258057146d610 /frontends/ast/ast.h | |
| parent | 2bda51ac34d6f542d1d6477eecede1d6527c10b3 (diff) | |
| download | yosys-16ea4ea61abd8f000564b3bfe1c88246c1caf631.tar.gz yosys-16ea4ea61abd8f000564b3bfe1c88246c1caf631.tar.bz2 yosys-16ea4ea61abd8f000564b3bfe1c88246c1caf631.zip | |
partial rebase of PeterCrozier's enum work onto current master
I tried to keep only the enum-related changes, and minimize the diff. (The
original commit also had a lot of work done to get typedefs working, but yosys
has diverged quite a bit since the 2018-03-09 commit, with a new typedef
implementation.) I did not include the import related changes either.
Original commit:
"Initial implementation of enum, typedef, import. Still a WIP."
https://github.com/PeterCrozier/yosys/commit/881833aa738e7404987646ea8076284e911fce3f
Diffstat (limited to 'frontends/ast/ast.h')
| -rw-r--r-- | frontends/ast/ast.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index 918d178c7..ffdcd9271 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -68,6 +68,8 @@ namespace AST AST_LIVE, AST_FAIR, AST_COVER, + AST_ENUM, + AST_ENUM_ITEM, AST_FCALL, AST_TO_BITS, @@ -181,6 +183,8 @@ namespace AST int port_id, range_left, range_right; uint32_t integer; double realvalue; + // set for IDs typed to an enumeration, not used + bool is_enum; // if this is a multirange memory then this vector contains offset and length of each dimension std::vector<int> multirange_dimensions; @@ -285,6 +289,9 @@ namespace AST int isConst() const; // return '1' for AST_CONSTANT and '2' for AST_REALVALUE double asReal(bool is_signed); RTLIL::Const realAsConst(int width); + + // helpers for enum + void allocateDefaultEnumValues(); }; // process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code |