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authorJannis Harder <me@jix.one>2022-05-24 17:18:53 +0200
committerZachary Snow <zachary.j.snow@gmail.com>2022-05-25 16:32:08 -0400
commitb75fa62e9b2a9f4410084fb1c80ceb23ed9d9c48 (patch)
tree3b14fe3f5d0ace0370c49b56d77fb9b2ee458f80 /frontends/ast/genrtlil.cc
parent63c9c9be5c0b0cc2b7f4588f1ac8e72eabc6bd0a (diff)
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verilog: fix $past's signedness
Diffstat (limited to 'frontends/ast/genrtlil.cc')
-rw-r--r--frontends/ast/genrtlil.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 020b4e5e8..6ef7da7a9 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -1084,7 +1084,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun
sub_sign_hint = true;
children.at(0)->detectSignWidthWorker(sub_width_hint, sub_sign_hint);
width_hint = max(width_hint, sub_width_hint);
- sign_hint = false;
+ sign_hint &= sub_sign_hint;
}
break;
}