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| author | Ahmed Irfan <ahmedirfan1983@gmail.com> | 2014-01-03 10:54:54 +0100 |
|---|---|---|
| committer | Ahmed Irfan <ahmedirfan1983@gmail.com> | 2014-01-03 10:54:54 +0100 |
| commit | 06482c046bcab4e2b9603f8954ce0f2fd501a73b (patch) | |
| tree | d160ad05402768e4f468ff0685593b81658e6a5a /frontends/ast/simplify.cc | |
| parent | 5da334fc2efd66c8a5efde925bb18212c34d0cef (diff) | |
| parent | fb2bf934dc6d2c969906b350c9a1b09a972bfdd7 (diff) | |
| download | yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.tar.gz yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.tar.bz2 yosys-06482c046bcab4e2b9603f8954ce0f2fd501a73b.zip | |
Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor
Diffstat (limited to 'frontends/ast/simplify.cc')
| -rw-r--r-- | frontends/ast/simplify.cc | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index f6df0c170..9b8ed7603 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -299,6 +299,8 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, case AST_LE: case AST_EQ: case AST_NE: + case AST_EQX: + case AST_NEX: case AST_GE: case AST_GT: width_hint = -1; @@ -495,8 +497,9 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, if (width != int(children[0]->bits.size())) { RTLIL::SigSpec sig(children[0]->bits); sig.extend_u0(width, children[0]->is_signed); - delete children[0]; + AstNode *old_child_0 = children[0]; children[0] = mkconst_bits(sig.as_const().bits, children[0]->is_signed); + delete old_child_0; } children[0]->is_signed = is_signed; } @@ -1258,12 +1261,14 @@ skip_dynamic_range_lvalue_expansion:; newNode = mkconst_bits(y.bits, sign_hint); } break; - if (0) { case AST_LT: const_func = RTLIL::const_lt; } - if (0) { case AST_LE: const_func = RTLIL::const_le; } - if (0) { case AST_EQ: const_func = RTLIL::const_eq; } - if (0) { case AST_NE: const_func = RTLIL::const_ne; } - if (0) { case AST_GE: const_func = RTLIL::const_ge; } - if (0) { case AST_GT: const_func = RTLIL::const_gt; } + if (0) { case AST_LT: const_func = RTLIL::const_lt; } + if (0) { case AST_LE: const_func = RTLIL::const_le; } + if (0) { case AST_EQ: const_func = RTLIL::const_eq; } + if (0) { case AST_NE: const_func = RTLIL::const_ne; } + if (0) { case AST_EQX: const_func = RTLIL::const_eqx; } + if (0) { case AST_NEX: const_func = RTLIL::const_nex; } + if (0) { case AST_GE: const_func = RTLIL::const_ge; } + if (0) { case AST_GT: const_func = RTLIL::const_gt; } if (children[0]->type == AST_CONSTANT && children[1]->type == AST_CONSTANT) { int cmp_width = std::max(children[0]->bits.size(), children[1]->bits.size()); bool cmp_signed = children[0]->is_signed && children[1]->is_signed; |