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| author | Clifford Wolf <clifford@clifford.at> | 2015-09-25 12:38:01 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-09-25 12:38:01 +0200 |
| commit | b2544cfcf77c3a7e923d05151a8e37b079559119 (patch) | |
| tree | 2e33dcdfae0ec288928b9612e346029f865d42f6 /frontends/ast | |
| parent | 924d9d6e86a5e9a2294479345daac1c03d78008a (diff) | |
| download | yosys-b2544cfcf77c3a7e923d05151a8e37b079559119.tar.gz yosys-b2544cfcf77c3a7e923d05151a8e37b079559119.tar.bz2 yosys-b2544cfcf77c3a7e923d05151a8e37b079559119.zip | |
Fixed segfault in AstNode::asReal
Diffstat (limited to 'frontends/ast')
| -rw-r--r-- | frontends/ast/ast.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index 5044eeabc..3e163bae7 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -831,7 +831,7 @@ double AstNode::asReal(bool is_signed) { RTLIL::Const val(bits); - bool is_negative = is_signed && val.bits.back() == RTLIL::State::S1; + bool is_negative = is_signed && !val.bits.empty() && val.bits.back() == RTLIL::State::S1; if (is_negative) val = const_neg(val, val, false, false, val.bits.size()); |