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authorZachary Snow <zach@zachjs.com>2021-03-11 11:49:15 -0500
committerZachary Snow <zach@zachjs.com>2021-03-11 12:36:51 -0500
commitcb9f3b6abfbc769589e5e5ceb2497955a155065c (patch)
tree6307b773dd556c05a8171fbb80999763e9b3c1ab /frontends/ast
parent83fc5cc28b60367a8cd16fb3d7eddb26db304513 (diff)
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verilog: disallow overriding global parameters
It was previously possible to override global parameters on a per-instance basis. This could be dangerous when using positional parameter bindings, hiding oversupplied parameters.
Diffstat (limited to 'frontends/ast')
-rw-r--r--frontends/ast/ast.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index b601d2e25..06e2e23a8 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -1286,6 +1286,8 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
}
else {
// must be global definition
+ if ((*it)->type == AST_PARAMETER)
+ (*it)->type = AST_LOCALPARAM; // cannot be overridden
(*it)->simplify(false, false, false, 1, -1, false, false); //process enum/other declarations
design->verilog_globals.push_back((*it)->clone());
current_scope.clear();