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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-30 09:07:02 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-04-30 09:07:02 -0700 |
| commit | bc380b0b56e0fa269a0d5844280cc4419d438d3a (patch) | |
| tree | bddbb5eb80efb65d24d40748303fac8a13fd06b7 /frontends/verific/verific.h | |
| parent | 33c9c045614051defe79caa528892aa6448b2852 (diff) | |
| parent | 5017ff4a978ae92a3a00d120bed29de9425108aa (diff) | |
| download | yosys-bc380b0b56e0fa269a0d5844280cc4419d438d3a.tar.gz yosys-bc380b0b56e0fa269a0d5844280cc4419d438d3a.tar.bz2 yosys-bc380b0b56e0fa269a0d5844280cc4419d438d3a.zip | |
Merge pull request #1999 from YosysHQ/eddie/verific_enum_again
verific: recover wiretype/enum attr as part of import_attributes()
Diffstat (limited to 'frontends/verific/verific.h')
| -rw-r--r-- | frontends/verific/verific.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verific/verific.h b/frontends/verific/verific.h index 2ccfcd42c..f168a2588 100644 --- a/frontends/verific/verific.h +++ b/frontends/verific/verific.h @@ -79,7 +79,7 @@ struct VerificImporter RTLIL::SigBit net_map_at(Verific::Net *net); RTLIL::IdString new_verific_id(Verific::DesignObj *obj); - void import_attributes(dict<RTLIL::IdString, RTLIL::Const> &attributes, Verific::DesignObj *obj); + void import_attributes(dict<RTLIL::IdString, RTLIL::Const> &attributes, Verific::DesignObj *obj, Verific::Netlist *nl = nullptr); RTLIL::SigSpec operatorInput(Verific::Instance *inst); RTLIL::SigSpec operatorInput1(Verific::Instance *inst); |