diff options
| author | Clifford Wolf <clifford@clifford.at> | 2018-10-05 09:26:10 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-10-05 09:26:10 +0200 |
| commit | 4b0448fc2cc707f312813b4e0826371fa384e3d9 (patch) | |
| tree | 794ff8eba515879077f7e541f81e2876db6c432d /frontends/verific | |
| parent | 5f1fea08d5e14ecaa1cf60eb865c60132a0ce3e1 (diff) | |
| download | yosys-4b0448fc2cc707f312813b4e0826371fa384e3d9.tar.gz yosys-4b0448fc2cc707f312813b4e0826371fa384e3d9.tar.bz2 yosys-4b0448fc2cc707f312813b4e0826371fa384e3d9.zip | |
Fix compiler warning in verific.cc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'frontends/verific')
| -rw-r--r-- | frontends/verific/verific.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index c5fa58313..06d98611a 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -1676,6 +1676,7 @@ YOSYS_NAMESPACE_END PRIVATE_NAMESPACE_BEGIN +#ifdef YOSYS_ENABLE_VERIFIC bool check_noverific_env() { const char *e = getenv("YOSYS_NOVERIFIC"); @@ -1685,6 +1686,7 @@ bool check_noverific_env() return false; return true; } +#endif struct VerificPass : public Pass { VerificPass() : Pass("verific", "load Verilog and VHDL designs using Verific") { } |