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| author | Clifford Wolf <clifford@clifford.at> | 2013-07-09 19:00:10 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2013-07-09 19:00:10 +0200 |
| commit | 618b2ac994360de4ffc9299aecb104a5bf5ba721 (patch) | |
| tree | eab20d78333bf2d266bb3d6b62738299f871525b /frontends/verilog/const2ast.cc | |
| parent | 7daeee340a7edad3f4450e1392f8bad8d8b9cb7c (diff) | |
| parent | 00a6c1d9a57da0e0b0fef07b2d618847ed93a9fd (diff) | |
| download | yosys-618b2ac994360de4ffc9299aecb104a5bf5ba721.tar.gz yosys-618b2ac994360de4ffc9299aecb104a5bf5ba721.tar.bz2 yosys-618b2ac994360de4ffc9299aecb104a5bf5ba721.zip | |
Merge branch 'master' of github.com:cliffordwolf/yosys
Diffstat (limited to 'frontends/verilog/const2ast.cc')
| -rw-r--r-- | frontends/verilog/const2ast.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/const2ast.cc b/frontends/verilog/const2ast.cc index 3a88fc046..e38ff2047 100644 --- a/frontends/verilog/const2ast.cc +++ b/frontends/verilog/const2ast.cc @@ -161,7 +161,7 @@ AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type) if (str == endptr) intval = -1; - // The "<bits>'[bodh]<digits>" syntax + // The "<bits>'s?[bodh]<digits>" syntax if (*endptr == '\'') { int len_in_bits = intval; |