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| author | Clifford Wolf <clifford@clifford.at> | 2013-03-31 11:19:11 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-03-31 11:19:11 +0200 |
| commit | 161565be104fd0c7b7c4224bd23e9502625e041a (patch) | |
| tree | f0c54a731d73dc7b334579acb56950497a9e1cb6 /frontends/verilog/parser.y | |
| parent | 5640b7d6078a681e33e85f06920394204f41c875 (diff) | |
| download | yosys-161565be104fd0c7b7c4224bd23e9502625e041a.tar.gz yosys-161565be104fd0c7b7c4224bd23e9502625e041a.tar.bz2 yosys-161565be104fd0c7b7c4224bd23e9502625e041a.zip | |
Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
Diffstat (limited to 'frontends/verilog/parser.y')
| -rw-r--r-- | frontends/verilog/parser.y | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/parser.y b/frontends/verilog/parser.y index 9caa236f8..22af178e8 100644 --- a/frontends/verilog/parser.y +++ b/frontends/verilog/parser.y @@ -607,7 +607,7 @@ always_stmt: ast_stack.pop_back(); } | attr TOK_INITIAL { - AstNode *node = new AstNode(AST_ALWAYS); + AstNode *node = new AstNode(AST_INITIAL); append_attr(node, $1); ast_stack.back()->children.push_back(node); ast_stack.push_back(node); |