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authorXiretza <xiretza@xiretza.xyz>2020-04-11 11:42:30 +0200
committerXiretza <xiretza@xiretza.xyz>2020-04-11 13:23:08 +0200
commit333981acfdf0d7ab0db35f7d2b41e51cf66d6b71 (patch)
tree0892b046a0c7bd980bc01a20565461c3b4fa3ff5 /frontends/verilog/preproc.cc
parent93ef516d919b40ace2099bc7586bfda8648f0757 (diff)
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Suppress output of Makefile.conf when printing source versions
The make targets echo-yosys-ver, echo-git-ver and echo-abc-rev can be used to programmatically extract contents of make variables for external scripts. Unfortunately, when a Makefile.conf exists, its contents would also be echoed, making the output almost unusable. This patch selectively disables this functionality for these special targets.
Diffstat (limited to 'frontends/verilog/preproc.cc')
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