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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2021-01-11 18:37:27 +0000 |
|---|---|---|
| committer | Dan Ravensloft <dan.ravensloft@gmail.com> | 2021-01-26 16:23:08 +0000 |
| commit | 74dad5afe72ff1afa777352e9ca078cd80878a52 (patch) | |
| tree | d5d43c4032819ca42a5685ad158c5a1603d5c016 /frontends/verilog/preproc.cc | |
| parent | b0004911ca15ec41db56c76c83461061fedc742e (diff) | |
| download | yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.tar.gz yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.tar.bz2 yosys-74dad5afe72ff1afa777352e9ca078cd80878a52.zip | |
scc: Add -specify option to find loops in boxes
Diffstat (limited to 'frontends/verilog/preproc.cc')
0 files changed, 0 insertions, 0 deletions