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| author | whitequark <whitequark@whitequark.org> | 2021-01-01 09:49:00 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-01-01 09:49:00 +0000 |
| commit | b0d4c63957713f46252f3b243890953e4764ca85 (patch) | |
| tree | 703b11b488002224eb5e52880de6c215a4cf7b7e /frontends/verilog/preproc.cc | |
| parent | 1387c3b41deb4b394745f19aa08ec3c7249c48b9 (diff) | |
| parent | 17812a1560b52b997889d606115266528cdc871f (diff) | |
| download | yosys-b0d4c63957713f46252f3b243890953e4764ca85.tar.gz yosys-b0d4c63957713f46252f3b243890953e4764ca85.tar.bz2 yosys-b0d4c63957713f46252f3b243890953e4764ca85.zip | |
Merge pull request #2480 from YosysHQ/dave/nexus-lram
nexus: Add LRAM inference
Diffstat (limited to 'frontends/verilog/preproc.cc')
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