diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-27 10:34:10 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-27 10:34:10 -0800 |
| commit | f443695a38fbdd8c2ca38cab45ca964a173dc158 (patch) | |
| tree | 4ac13e4fe8ee5e71f963c4230f9f26f32901c2ba /frontends/verilog/preproc.cc | |
| parent | d730bba6d2847515795c32d3a753320b8b48bee0 (diff) | |
| parent | da6abc014987ef562a577dc374bcb03aad9256cd (diff) | |
| download | yosys-f443695a38fbdd8c2ca38cab45ca964a173dc158.tar.gz yosys-f443695a38fbdd8c2ca38cab45ca964a173dc158.tar.bz2 yosys-f443695a38fbdd8c2ca38cab45ca964a173dc158.zip | |
Merge remote-tracking branch 'origin/master' into eddie/verific_help
Diffstat (limited to 'frontends/verilog/preproc.cc')
| -rw-r--r-- | frontends/verilog/preproc.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 7e107dc26..161253a99 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -28,7 +28,7 @@ * * Ad-hoc implementation of a Verilog preprocessor. The directives `define, * `include, `ifdef, `ifndef, `else and `endif are handled here. All other - * directives are handled by the lexer (see lexer.l). + * directives are handled by the lexer (see verilog_lexer.l). * */ |