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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-22 11:45:49 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-22 11:45:49 -0700 |
| commit | 4486a98fd5928a4e3cdf9cd27c27b7dd821513bb (patch) | |
| tree | 0afd22de8a09ab3995355e3813015c4523bd63fd /frontends/verilog/verilog_frontend.cc | |
| parent | cbb85e40e87fbfb1602bb934ed76a97efb9e55c6 (diff) | |
| parent | ec88129a5cf510afc39ea12efa6059bed3eadfc3 (diff) | |
| download | yosys-4486a98fd5928a4e3cdf9cd27c27b7dd821513bb.tar.gz yosys-4486a98fd5928a4e3cdf9cd27c27b7dd821513bb.tar.bz2 yosys-4486a98fd5928a4e3cdf9cd27c27b7dd821513bb.zip | |
Merge remote-tracking branch 'origin/xc7srl' into xc7mux
Diffstat (limited to 'frontends/verilog/verilog_frontend.cc')
| -rw-r--r-- | frontends/verilog/verilog_frontend.cc | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 504f8b3f3..ed6ce2ecb 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -145,8 +145,18 @@ struct VerilogFrontend : public Frontend { log(" -nodpi\n"); log(" disable DPI-C support\n"); log("\n"); + log(" -noblackbox\n"); + log(" do not automatically add a (* blackbox *) attribute to an\n"); + log(" empty module.\n"); + log("\n"); log(" -lib\n"); log(" only create empty blackbox modules. This implies -DBLACKBOX.\n"); + log(" modules with the (* whitebox *) attribute will be preserved.\n"); + log(" (* lib_whitebox *) will be treated like (* whitebox *).\n"); + log("\n"); + log(" -nowb\n"); + log(" delete (* whitebox *) and (* lib_whitebox *) attributes from\n"); + log(" all modules.\n"); log("\n"); log(" -noopt\n"); log(" don't perform basic optimizations (such as const folding) in the\n"); @@ -227,7 +237,9 @@ struct VerilogFrontend : public Frontend { formal_mode = false; norestrict_mode = false; assume_asserts_mode = false; + noblackbox_mode = false; lib_mode = false; + nowb_mode = false; default_nettype_wire = true; log_header(design, "Executing Verilog-2005 frontend.\n"); @@ -329,11 +341,19 @@ struct VerilogFrontend : public Frontend { flag_nodpi = true; continue; } + if (arg == "-noblackbox") { + noblackbox_mode = true; + continue; + } if (arg == "-lib") { lib_mode = true; defines_map["BLACKBOX"] = string(); continue; } + if (arg == "-nowb") { + nowb_mode = true; + continue; + } if (arg == "-noopt") { flag_noopt = true; continue; @@ -429,7 +449,8 @@ struct VerilogFrontend : public Frontend { if (flag_nodpi) error_on_dpi_function(current_ast); - AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire); + AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, + flag_nomeminit, flag_nomem2reg, flag_mem2reg, noblackbox_mode, lib_mode, nowb_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire); if (!flag_nopp) delete lexin; |