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| author | Clifford Wolf <clifford@clifford.at> | 2019-04-20 20:51:54 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-04-20 20:51:54 +0200 |
| commit | f84a84e3f1a27b361c21fcd30fcf50c1a6586629 (patch) | |
| tree | 2d6b8acf72eead2e314295326d567e17e0c66871 /frontends/verilog/verilog_frontend.cc | |
| parent | e3687f6f4e10789223213949b8490bd83ec285f2 (diff) | |
| parent | f3ad8d680a3195ab9525b0a8b3f8dbff9d5e6e24 (diff) | |
| download | yosys-f84a84e3f1a27b361c21fcd30fcf50c1a6586629.tar.gz yosys-f84a84e3f1a27b361c21fcd30fcf50c1a6586629.tar.bz2 yosys-f84a84e3f1a27b361c21fcd30fcf50c1a6586629.zip | |
Merge pull request #943 from YosysHQ/clifford/whitebox
[WIP] Add "whitebox" attribute, add "read_verilog -wb"
Diffstat (limited to 'frontends/verilog/verilog_frontend.cc')
| -rw-r--r-- | frontends/verilog/verilog_frontend.cc | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 504f8b3f3..4e2c5abb5 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -148,6 +148,10 @@ struct VerilogFrontend : public Frontend { log(" -lib\n"); log(" only create empty blackbox modules. This implies -DBLACKBOX.\n"); log("\n"); + log(" -wb\n"); + log(" like -lib, except do not touch modules with the whitebox\n"); + log(" attribute set. This also implies -DBLACKBOX.\n"); + log("\n"); log(" -noopt\n"); log(" don't perform basic optimizations (such as const folding) in the\n"); log(" high-level front-end.\n"); @@ -228,6 +232,7 @@ struct VerilogFrontend : public Frontend { norestrict_mode = false; assume_asserts_mode = false; lib_mode = false; + wb_mode = false; default_nettype_wire = true; log_header(design, "Executing Verilog-2005 frontend.\n"); @@ -329,11 +334,16 @@ struct VerilogFrontend : public Frontend { flag_nodpi = true; continue; } - if (arg == "-lib") { + if (arg == "-lib" && !wb_mode) { lib_mode = true; defines_map["BLACKBOX"] = string(); continue; } + if (arg == "-wb" && !lib_mode) { + wb_mode = true; + defines_map["BLACKBOX"] = string(); + continue; + } if (arg == "-noopt") { flag_noopt = true; continue; @@ -429,7 +439,7 @@ struct VerilogFrontend : public Frontend { if (flag_nodpi) error_on_dpi_function(current_ast); - AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire); + AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit, flag_nomem2reg, flag_mem2reg, lib_mode, wb_mode, flag_noopt, flag_icells, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire); if (!flag_nopp) delete lexin; |