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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-12 08:50:39 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-12 08:50:39 -0700 |
| commit | f7a9769c140f6a56e51d7384dfd8e76bf2aef66d (patch) | |
| tree | 4be49b8b30a03ac7d4deafaa7318de275d5c3a7f /frontends/verilog/verilog_frontend.h | |
| parent | ac2aff9e28a087a9a2697cd6ccf754af738903a7 (diff) | |
| parent | a91ea6612a73568782c80bd12ce2875353e2b5c5 (diff) | |
| download | yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.tar.gz yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.tar.bz2 yosys-f7a9769c140f6a56e51d7384dfd8e76bf2aef66d.zip | |
Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'frontends/verilog/verilog_frontend.h')
| -rw-r--r-- | frontends/verilog/verilog_frontend.h | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index ca40946cb..a7c9b2fe6 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -69,14 +69,11 @@ namespace VERILOG_FRONTEND // running in -assert-assumes mode extern bool assert_assumes_mode; - // running in -noblackbox mode - extern bool noblackbox_mode; - // running in -lib mode extern bool lib_mode; - // running in -nowb mode - extern bool nowb_mode; + // running in -specify mode + extern bool specify_mode; // lexer input stream extern std::istream *lexin; |