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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-08 16:31:59 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-08 16:31:59 -0700 |
| commit | bca3cf684367ac5cf33ac05506d9e604a325bd3f (patch) | |
| tree | b2b29b441c108984719d0b470ec34b779abec511 /frontends/verilog/verilog_lexer.l | |
| parent | f7c7003a193361285ba59d1315c1e7c26c4c52f1 (diff) | |
| parent | e194e65358058f3a039636d2603cc093f7b75e50 (diff) | |
| download | yosys-bca3cf684367ac5cf33ac05506d9e604a325bd3f.tar.gz yosys-bca3cf684367ac5cf33ac05506d9e604a325bd3f.tar.bz2 yosys-bca3cf684367ac5cf33ac05506d9e604a325bd3f.zip | |
Merge branch 'master' into xaig
Diffstat (limited to 'frontends/verilog/verilog_lexer.l')
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index 1b1873e24..6ef38252a 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -189,6 +189,14 @@ YOSYS_NAMESPACE_END "always_ff" { SV_KEYWORD(TOK_ALWAYS); } "always_latch" { SV_KEYWORD(TOK_ALWAYS); } + /* use special token for labels on assert, assume, cover, and restrict because it's insanley complex + to fix parsing of cells otherwise. (the current cell parser forces a reduce very early to update some + global state.. its a mess) */ +[a-zA-Z_$][a-zA-Z0-9_$]*/[ \t\r\n]*:[ \t\r\n]*(assert|assume|cover|restrict)[^a-zA-Z0-9_$\.] { + frontend_verilog_yylval.string = new std::string(std::string("\\") + yytext); + return TOK_SVA_LABEL; +} + "assert" { if (formal_mode) return TOK_ASSERT; SV_KEYWORD(TOK_ASSERT); } "assume" { if (formal_mode) return TOK_ASSUME; SV_KEYWORD(TOK_ASSUME); } "cover" { if (formal_mode) return TOK_COVER; SV_KEYWORD(TOK_COVER); } @@ -303,7 +311,7 @@ supply1 { return TOK_SUPPLY1; } [a-zA-Z_$][a-zA-Z0-9_$\.]* { frontend_verilog_yylval.string = new std::string(std::string("\\") + yytext); - return TOK_ID; + return TOK_ID; } "/*"[ \t]*(synopsys|synthesis)[ \t]*translate_off[ \t]*"*/" { |