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authorLukasz Dalek <ldalek@antmicro.com>2020-06-01 15:25:24 +0200
committerKamil Rakoczy <krakoczy@antmicro.com>2020-06-26 15:38:20 +0200
commit6f9be939bd7653b0bdcae93a1033a086a4561b68 (patch)
tree36e030765712c620a2832cbabbf179262795e0c5 /frontends/verilog/verilog_parser.y
parent7cb56f34b06de666935fbda315ce7c7bd45048b3 (diff)
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Parse macro call attached semicolon as empty expression
Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
Diffstat (limited to 'frontends/verilog/verilog_parser.y')
-rw-r--r--frontends/verilog/verilog_parser.y2
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 18745e38e..35e34a124 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -745,7 +745,7 @@ module_body:
module_body_stmt:
task_func_decl | specify_block | param_decl | localparam_decl | typedef_decl | defparam_decl | specparam_declaration | wire_decl | assign_stmt | cell_stmt |
enum_decl | struct_decl |
- always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block;
+ always_stmt | TOK_GENERATE module_gen_body TOK_ENDGENERATE | defattr | assert_property | checker_decl | ignored_specify_block | /* empty statement */ ';';
checker_decl:
TOK_CHECKER TOK_ID ';' {