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| author | Udi Finkelstein <github@udifink.com> | 2018-09-25 00:32:57 +0300 |
|---|---|---|
| committer | Udi Finkelstein <github@udifink.com> | 2018-09-25 00:32:57 +0300 |
| commit | 80a07652f2eb5e13190f46dcc116207a0427dc65 (patch) | |
| tree | 7474c92ca2c8d0118191d065ee4912ef7adebca7 /frontends/verilog/verilog_parser.y | |
| parent | c693f595c53e2e40840ff40b5b5ba06767582d23 (diff) | |
| download | yosys-80a07652f2eb5e13190f46dcc116207a0427dc65.tar.gz yosys-80a07652f2eb5e13190f46dcc116207a0427dc65.tar.bz2 yosys-80a07652f2eb5e13190f46dcc116207a0427dc65.zip | |
Fixed issue #630 by fixing a minor typo in the previous commit
(as well as a non critical minor code optimization)
Diffstat (limited to 'frontends/verilog/verilog_parser.y')
0 files changed, 0 insertions, 0 deletions