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| author | Clifford Wolf <clifford@clifford.at> | 2013-07-09 14:31:57 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-07-09 14:31:57 +0200 |
| commit | 00a6c1d9a57da0e0b0fef07b2d618847ed93a9fd (patch) | |
| tree | 149e564703234381d2c8f03e6698bede1735fd53 /frontends/verilog | |
| parent | e8da3ea7b647f2c1eeba8a84590df7b05ca4e046 (diff) | |
| download | yosys-00a6c1d9a57da0e0b0fef07b2d618847ed93a9fd.tar.gz yosys-00a6c1d9a57da0e0b0fef07b2d618847ed93a9fd.tar.bz2 yosys-00a6c1d9a57da0e0b0fef07b2d618847ed93a9fd.zip | |
Major redesign of expr width/sign detecion (verilog/ast frontend)
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/const2ast.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verilog/const2ast.cc b/frontends/verilog/const2ast.cc index 3a88fc046..e38ff2047 100644 --- a/frontends/verilog/const2ast.cc +++ b/frontends/verilog/const2ast.cc @@ -161,7 +161,7 @@ AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type) if (str == endptr) intval = -1; - // The "<bits>'[bodh]<digits>" syntax + // The "<bits>'s?[bodh]<digits>" syntax if (*endptr == '\'') { int len_in_bits = intval; |