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| author | Clifford Wolf <clifford@clifford.at> | 2014-01-17 16:42:40 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-01-17 16:42:40 +0100 |
| commit | 2e370d5a2f364a469f11a2dc6f4217a9e9880a1c (patch) | |
| tree | 0b0d823ab22dfdb0851f7d5d6e1651a4bc4cf36e /frontends/verilog | |
| parent | 651ce67d979d355c53e9bf17b91b22368adca072 (diff) | |
| download | yosys-2e370d5a2f364a469f11a2dc6f4217a9e9880a1c.tar.gz yosys-2e370d5a2f364a469f11a2dc6f4217a9e9880a1c.tar.bz2 yosys-2e370d5a2f364a469f11a2dc6f4217a9e9880a1c.zip | |
Added support for $adff with undef data inputs to opt_rmdff
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions