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| author | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
|---|---|---|
| committer | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
| commit | 341fd872b59e8f95aa14afd9f17225d2c03a4283 (patch) | |
| tree | 21802e73ca767d124971d43d3f78d9f4cf7d62e2 /frontends/verilog | |
| parent | c8bc1793a4e8230c29fca4a34862414e8ab8722b (diff) | |
| parent | f8d5920a7e61f78873b7bf49dd7e8f3a83f7adf3 (diff) | |
| download | yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.gz yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.bz2 yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.zip | |
Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad_script
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/preproc.cc | 2 | ||||
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 7e107dc26..161253a99 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -28,7 +28,7 @@ * * Ad-hoc implementation of a Verilog preprocessor. The directives `define, * `include, `ifdef, `ifndef, `else and `endif are handled here. All other - * directives are handled by the lexer (see lexer.l). + * directives are handled by the lexer (see verilog_lexer.l). * */ diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index c8984c2c4..ca23df3e8 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -28,7 +28,7 @@ * * A simple lexer for Verilog code. Non-preprocessor compiler directives are * handled here. The preprocessor stuff is handled in preproc.cc. Everything - * else is left to the bison parser (see parser.y). + * else is left to the bison parser (see verilog_parser.y). * */ |