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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-20 11:08:49 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-20 11:08:49 -0800 |
| commit | 45ddd9066e03ce7b076bcc634c6231c6b3a5ed3d (patch) | |
| tree | 483525d8d194079d1d095bfa62b1c00c6f634b9c /frontends/verilog | |
| parent | 62e5ff9ba8ce9711317f97efdb9810491aaa4f06 (diff) | |
| download | yosys-45ddd9066e03ce7b076bcc634c6231c6b3a5ed3d.tar.gz yosys-45ddd9066e03ce7b076bcc634c6231c6b3a5ed3d.tar.bz2 yosys-45ddd9066e03ce7b076bcc634c6231c6b3a5ed3d.zip | |
synth to take -abc9 argument
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions