diff options
| author | Kamil Rakoczy <krakoczy@antmicro.com> | 2021-02-11 12:53:07 +0100 |
|---|---|---|
| committer | Kamil Rakoczy <krakoczy@antmicro.com> | 2021-02-11 15:05:38 +0100 |
| commit | 75335344295a51c11bb72e0add10e365a34ccc1d (patch) | |
| tree | 56859d2a50896707bd20c11619e19de8736b32d4 /frontends/verilog | |
| parent | eff18a2b1519428b11400979f116342086c13e13 (diff) | |
| download | yosys-75335344295a51c11bb72e0add10e365a34ccc1d.tar.gz yosys-75335344295a51c11bb72e0add10e365a34ccc1d.tar.bz2 yosys-75335344295a51c11bb72e0add10e365a34ccc1d.zip | |
Add missing is_signed to type_atom
Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index fb5846f7b..69fd66cba 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1491,10 +1491,10 @@ enum_base_type: type_atom type_signing | %empty { astbuf1->is_reg = true; addRange(astbuf1); } ; -type_atom: TOK_INTEGER { astbuf1->is_reg = true; addRange(astbuf1); } // 4-state signed - | TOK_INT { astbuf1->is_reg = true; addRange(astbuf1); } // 2-state signed - | TOK_SHORTINT { astbuf1->is_reg = true; addRange(astbuf1, 15, 0); } // 2-state signed - | TOK_BYTE { astbuf1->is_reg = true; addRange(astbuf1, 7, 0); } // 2-state signed +type_atom: TOK_INTEGER { astbuf1->is_reg = true; astbuf1->is_signed = true; addRange(astbuf1); } // 4-state signed + | TOK_INT { astbuf1->is_reg = true; astbuf1->is_signed = true; addRange(astbuf1); } // 2-state signed + | TOK_SHORTINT { astbuf1->is_reg = true; astbuf1->is_signed = true; addRange(astbuf1, 15, 0); } // 2-state signed + | TOK_BYTE { astbuf1->is_reg = true; astbuf1->is_signed = true; addRange(astbuf1, 7, 0); } // 2-state signed ; type_vec: TOK_REG { astbuf1->is_reg = true; } // unsigned |