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| author | clairexen <claire@symbioticeda.com> | 2020-07-01 16:40:20 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-07-01 16:40:20 +0200 |
| commit | 8ce4f8790ecf33f7df19e0fb54a749abe026831d (patch) | |
| tree | 20d18b6f47cb74be76d91568cfc0e0f51a47f1dd /frontends/verilog | |
| parent | b1707407a0912fe44ecf83f6f8e64b13a1c4daee (diff) | |
| parent | 429d37ff41b5a058fdd0b70f23a55170a973c369 (diff) | |
| download | yosys-8ce4f8790ecf33f7df19e0fb54a749abe026831d.tar.gz yosys-8ce4f8790ecf33f7df19e0fb54a749abe026831d.tar.bz2 yosys-8ce4f8790ecf33f7df19e0fb54a749abe026831d.zip | |
Merge pull request #2179 from splhack/static-cast
Support SystemVerilog Static Cast
Diffstat (limited to 'frontends/verilog')
| -rw-r--r-- | frontends/verilog/verilog_lexer.l | 2 | ||||
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 19 |
2 files changed, 21 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index 028106381..f2241066f 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -517,6 +517,8 @@ import[ \t\r\n]+\"(DPI|DPI-C)\"[ \t\r\n]+function[ \t\r\n]+ { "<<<" { return OP_SSHL; } ">>>" { return OP_SSHR; } +"'" { return OP_CAST; } + "::" { return TOK_PACKAGESEP; } "++" { return TOK_INCREMENT; } "--" { return TOK_DECREMENT; } diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 96d9299fe..0fdf2b516 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -299,6 +299,7 @@ static void rewriteAsMemoryNode(AstNode *node, AstNode *rangeNode) %left '+' '-' %left '*' '/' '%' %left OP_POW +%left OP_CAST %right UNARY_OPS %define parse.error verbose @@ -3042,6 +3043,24 @@ basic_expr: $$ = new AstNode(AST_LOGIC_NOT, $3); SET_AST_NODE_LOC($$, @1, @3); append_attr($$, $2); + } | + TOK_SIGNED OP_CAST '(' expr ')' { + if (!sv_mode) + frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode."); + $$ = new AstNode(AST_TO_SIGNED, $4); + SET_AST_NODE_LOC($$, @1, @4); + } | + TOK_UNSIGNED OP_CAST '(' expr ')' { + if (!sv_mode) + frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode."); + $$ = new AstNode(AST_TO_UNSIGNED, $4); + SET_AST_NODE_LOC($$, @1, @4); + } | + basic_expr OP_CAST '(' expr ')' { + if (!sv_mode) + frontend_verilog_yyerror("Static cast is only supported in SystemVerilog mode."); + $$ = new AstNode(AST_CAST_SIZE, $1, $4); + SET_AST_NODE_LOC($$, @1, @4); }; concat_list: |