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| author | Clifford Wolf <clifford@clifford.at> | 2016-09-02 13:46:56 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2016-09-02 13:46:56 +0200 |
| commit | 948aac9e1eaed04aa8de08e62cfb078d6337e9c9 (patch) | |
| tree | 2da60b83ac46997fbadf9001500887f1591a4dd7 /frontends/verilog | |
| parent | d88cd0ae7f8761637722d5d2c6cc1c8bac762ce3 (diff) | |
| download | yosys-948aac9e1eaed04aa8de08e62cfb078d6337e9c9.tar.gz yosys-948aac9e1eaed04aa8de08e62cfb078d6337e9c9.tar.bz2 yosys-948aac9e1eaed04aa8de08e62cfb078d6337e9c9.zip | |
Don't re-create hex_dict for each value
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions