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| author | Clifford Wolf <clifford@clifford.at> | 2019-08-10 09:38:22 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-10 09:38:22 +0200 |
| commit | dad9514d86170d2269f90da5cee5eea8df0b560a (patch) | |
| tree | f030c536f5ab9f6ab15534f2fb4952ab9257c450 /frontends/verilog | |
| parent | 39f4c1096ac3b5964bfa087c2b7f2e8d5a9c1ef3 (diff) | |
| parent | 6d0be8d206e8f484473ee9fb891b0317d6741974 (diff) | |
| download | yosys-dad9514d86170d2269f90da5cee5eea8df0b560a.tar.gz yosys-dad9514d86170d2269f90da5cee5eea8df0b560a.tar.bz2 yosys-dad9514d86170d2269f90da5cee5eea8df0b560a.zip | |
Merge pull request #1276 from YosysHQ/clifford/fix1273
Disable NMUX, AOI3, OAI3, AOI4, OAI4 in ABC default gate lib
Diffstat (limited to 'frontends/verilog')
0 files changed, 0 insertions, 0 deletions