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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-31 13:19:47 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-31 13:19:47 +0200 |
| commit | 1cb25c05b37b0172dbc50e140fe20f25d973dd8a (patch) | |
| tree | 4bccb9f45ccad05346697c79afca9a1b21dced9c /frontends/vhdl2verilog | |
| parent | 1202f7aa4bb0f9afde157ebc4701d64e7e38abd8 (diff) | |
| download | yosys-1cb25c05b37b0172dbc50e140fe20f25d973dd8a.tar.gz yosys-1cb25c05b37b0172dbc50e140fe20f25d973dd8a.tar.bz2 yosys-1cb25c05b37b0172dbc50e140fe20f25d973dd8a.zip | |
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Diffstat (limited to 'frontends/vhdl2verilog')
| -rw-r--r-- | frontends/vhdl2verilog/vhdl2verilog.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/frontends/vhdl2verilog/vhdl2verilog.cc b/frontends/vhdl2verilog/vhdl2verilog.cc index 63dc85acc..f0545700a 100644 --- a/frontends/vhdl2verilog/vhdl2verilog.cc +++ b/frontends/vhdl2verilog/vhdl2verilog.cc @@ -28,6 +28,8 @@ #include <errno.h> #include <limits.h> +YOSYS_NAMESPACE_BEGIN + struct Vhdl2verilogPass : public Pass { Vhdl2verilogPass() : Pass("vhdl2verilog", "importing VHDL designs using vhdl2verilog") { } virtual void help() @@ -190,3 +192,5 @@ struct Vhdl2verilogPass : public Pass { } } Vhdl2verilogPass; +YOSYS_NAMESPACE_END + |