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authorClifford Wolf <clifford@clifford.at>2019-06-20 12:03:00 +0200
committerClifford Wolf <clifford@clifford.at>2019-06-20 12:03:00 +0200
commit2428fb7dc2c2f24eab0d4283358e4eb7e8373146 (patch)
tree50111b37b6a5cdb991e96df3edf4f97e2f59b560 /frontends
parent3b1e5264d8e333937fa9c06075b092bfd27be317 (diff)
parent8b8af10f5e612eb1a39320e20b2d1d6f1e7d45df (diff)
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Merge branch 'unpacked_arrays' of https://github.com/towoe/yosys-sv into towoe-unpacked_arrays
Diffstat (limited to 'frontends')
-rw-r--r--frontends/verilog/verilog_parser.y8
1 files changed, 7 insertions, 1 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 8234479cc..4895d0302 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -1400,7 +1400,13 @@ wire_name:
node->children.push_back(rng);
}
node->type = AST_MEMORY;
- node->children.push_back($2);
+ auto *rangeNode = $2;
+ if (rangeNode->type == AST_RANGE && rangeNode->children.size() == 1) {
+ // SV array size [n], rewrite as [n-1:0]
+ rangeNode->children[0] = new AstNode(AST_SUB, rangeNode->children[0], AstNode::mkconst_int(1, true));
+ rangeNode->children.push_back(AstNode::mkconst_int(0, false));
+ }
+ node->children.push_back(rangeNode);
}
if (current_function_or_task == NULL) {
if (do_not_require_port_stubs && (node->is_input || node->is_output) && port_stubs.count(*$1) == 0) {