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| author | Clifford Wolf <clifford@clifford.at> | 2019-11-20 12:56:31 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-11-20 12:56:31 +0100 |
| commit | 55bda2b2c693a7ff79da545e7b52901de00df475 (patch) | |
| tree | 92b3e480508add4556ca59ac331cac5865169e11 /frontends | |
| parent | f6ff311a1dc9876911594328350e2d3fc62a5535 (diff) | |
| download | yosys-55bda2b2c693a7ff79da545e7b52901de00df475.tar.gz yosys-55bda2b2c693a7ff79da545e7b52901de00df475.tar.bz2 yosys-55bda2b2c693a7ff79da545e7b52901de00df475.zip | |
Correctly treat empty modules as blackboxes in Verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'frontends')
| -rw-r--r-- | frontends/verific/verific.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index c2086afa4..de41e1a5c 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -130,7 +130,7 @@ RTLIL::SigBit VerificImporter::net_map_at(Net *net) bool is_blackbox(Netlist *nl) { - if (nl->IsBlackBox()) + if (nl->IsBlackBox() || nl->IsEmptyBox()) return true; const char *attr = nl->GetAttValue("blackbox"); |