diff options
| author | clairexen <claire@symbioticeda.com> | 2020-05-29 16:37:23 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-29 16:37:23 +0200 |
| commit | 94c10353897c6b2b3f960bdd6647a5da9c1d9f2c (patch) | |
| tree | 695ca7d8b26c8c4268498c76e09c157d9846bde0 /kernel/celledges.cc | |
| parent | af36afe722dc35b129351af592ef340e512e0292 (diff) | |
| parent | f88bef767263590c94e157d0989afa91db3ccdb0 (diff) | |
| download | yosys-94c10353897c6b2b3f960bdd6647a5da9c1d9f2c.tar.gz yosys-94c10353897c6b2b3f960bdd6647a5da9c1d9f2c.tar.bz2 yosys-94c10353897c6b2b3f960bdd6647a5da9c1d9f2c.zip | |
Merge pull request #1885 from Xiretza/mod-rem-cells
Fix modulo/remainder semantics
Diffstat (limited to 'kernel/celledges.cc')
| -rw-r--r-- | kernel/celledges.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/celledges.cc b/kernel/celledges.cc index 54e0168e2..314e7c77e 100644 --- a/kernel/celledges.cc +++ b/kernel/celledges.cc @@ -187,7 +187,7 @@ bool YOSYS_NAMESPACE_PREFIX AbstractCellEdgesDatabase::add_edges_from_cell(RTLIL return true; } - // FIXME: $mul $div $mod $slice $concat + // FIXME: $mul $div $mod $divfloor $modfloor $slice $concat // FIXME: $lut $sop $alu $lcu $macc $fa return false; |