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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-20 20:18:17 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-20 20:18:17 -0700 |
| commit | b7a48e3e0f49f09e12a2b394b62256a87c398dbc (patch) | |
| tree | 9667249b7e1ab86c264f44d0a2f03b326e2763fa /kernel/consteval.h | |
| parent | c320abc3f490b09b21804581c2b386c30d186a1e (diff) | |
| parent | 33960dd3d84b628f6e5de45c112368dc80626457 (diff) | |
| download | yosys-b7a48e3e0f49f09e12a2b394b62256a87c398dbc.tar.gz yosys-b7a48e3e0f49f09e12a2b394b62256a87c398dbc.tar.bz2 yosys-b7a48e3e0f49f09e12a2b394b62256a87c398dbc.zip | |
Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'kernel/consteval.h')
| -rw-r--r-- | kernel/consteval.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/kernel/consteval.h b/kernel/consteval.h index 09b4c434b..7a83d28e7 100644 --- a/kernel/consteval.h +++ b/kernel/consteval.h @@ -128,8 +128,8 @@ struct ConstEval RTLIL::SigSpec sig_a, sig_b, sig_s, sig_y; - log_assert(cell->hasPort(ID(Y))); - sig_y = values_map(assign_map(cell->getPort(ID(Y)))); + log_assert(cell->hasPort(ID::Y)); + sig_y = values_map(assign_map(cell->getPort(ID::Y))); if (sig_y.is_fully_const()) return true; @@ -139,11 +139,11 @@ struct ConstEval return false; } - if (cell->hasPort(ID(A))) - sig_a = cell->getPort(ID(A)); + if (cell->hasPort(ID::A)) + sig_a = cell->getPort(ID::A); - if (cell->hasPort(ID(B))) - sig_b = cell->getPort(ID(B)); + if (cell->hasPort(ID::B)) + sig_b = cell->getPort(ID::B); if (cell->type.in(ID($mux), ID($pmux), ID($_MUX_), ID($_NMUX_))) { @@ -298,11 +298,11 @@ struct ConstEval return false; } - RTLIL::Const result(0, GetSize(cell->getPort(ID(Y)))); + RTLIL::Const result(0, GetSize(cell->getPort(ID::Y))); if (!macc.eval(result)) log_abort(); - set(cell->getPort(ID(Y)), result); + set(cell->getPort(ID::Y), result); } else { |